Ibrahim Abu Kharmeh

Ibrahim currently works as a Silicon Design Engineer for AMD in Cambridge. Previously, he worked on implementing D-cache controllers using the Chisel language and their models using the SST framework in C++. He also evaluated RISC-V code and CHERI on RISC-V to identify optimization opportunities and implemented them in SystemVerilog.

He holds an Electronics Engineering MSc from the University of Southampton, where he designed a novel NISC-based processor for Fast Fourier Transform and a RISC processor for Affine Transform. Prior to that, he served as a HW/SW engineer at Gemini 2000 LTD.

Basic Info

• Name: Ibrahim Abu Kharmeh
• Birthdate: December 18, 1995
• Address: Cambridge, UK
• Email: abukharmeh (at) gmail (dot) com
• Website: ibrahim.abukharmeh.com
• Hobbies: Cycling & Swimming

Academic Background

University of Southampton

MSc in Electronics Engineering (2019–2020)
Thesis Title: NISC-based Implementations of FFT on FPGAs

Relevant Courses:

• Digital System Design (SystemVerilog, ModelSim, Quartus)
• Secure Hardware and Embedded Devices
• Digital Systems Synthesis (Custom FFT Core in SystemVerilog, SystemC, Questasim)

International University of Sarajevo

BSc in Electrical and Electronics Engineering (2013–2017)
Thesis Title: 3D IoT-enabled HID Device

Relevant Courses:

• Digital Logic Design (A-)
• Programming for Engineers (B)
• Algorithms and Data Structures (A)
• Parallel Computing (A-)

Total CGPA: 9.06/10

Anadolu University (Erasmus Exchange)

Erasmus Exchange Student

Relevant Courses:

• Computer Architecture (B)
• Microprocessor (A)